Continuing yesterday’s posting, here is another part from the senior project folder. This time a CMOS inverter (NOT gate). Positive and negative power is applied to the device, which will inverse a given input at the output. This inverter was designed at 300µm for the sake of practicality. A later post will show another CMOS inverter re-designed at 50µm. This inverter is comprised of eight process layers and masks.
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