A quick post today:
After working out some snags with new chemicals, this past week has finally afforded me some actual progress on my wafer lithography. I’ll explain later as I document the multi-month process, but for now here’s a trio of screencaps from the microscope. As usual, click on the images for full size.
Small Vernier scale used to gauge how the development of a particular layer is going.
Small text describing a 7mm x 2mm inductor.
Text labeling a PMOSFET.
